MAX3679A
+3.3V, Low-Jitter Crystal to LVPECL
Clock Generator
8 _______________________________________________________________________________________
Crystal Selection
The crystal oscillator is designed to drive a fundamental
mode, AT-cut crystal resonator. See Table 3 for recom-
mended crystal specifications. See Figure 4 for external
capacitance connection.
Crystal Input Layout and
Frequency Stability
The crystal, trace, and two external capacitors should
be placed on the board as close as possible to the
MAX3679A’s X_IN and X_OUT pins to reduce crosstalk
of active signals into the oscillator.
The layout shown in Figure 3 gives approximately 3pF
of trace plus footprint capacitors per side of the crystal
(Y1). The dielectric material is FR4 and dielectric thick-
ness of the reference board is 15 mils. Using a 25MHz
crystal and the capacitor values of C22 = 27pF and
C23 = 33pF, the measured output frequency accuracy
is -14ppm at +25°C ambient temperature.
Table 2. Output Divider Configuration
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