Rainbow-electronics DS17487 Manual do Utilizador Página 1

1 of 38 050802 FEATURES Incorporates industry standard DS1287 PC clock plus enhanced features: § Y2K compliant § +3V or +5V operation §

DS17485/DS17487 10 of 38 REGISTER B MSB LSB BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 SET PIE AIE UIE SQWE DM

DS17485/DS17487 11 of 38 REGISTER C MSB LSB BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 IRQF PF AF UF 0 0 0 0 IRQF – Interrupt

DS17485/DS17487 12 of 38 NV RAM–RTC The general-purpose NV RAM bytes are not dedicated to any special function within the DS17485/DS17487. They can

DS17485/DS17487 13 of 38 possible interrupt sources has its flag and enable bits both set. The IRQF bit in Register C is a 1 whenever the IRQ pin

DS17485/DS17487 14 of 38 Table 2. PERIODIC INTERRUPT RATE AND SQUARE-WAVE OUTPUT FREQUENCY EXTENDED REGISTER B SELECT BITS REGISTER A E32k RS3 RS2

DS17485/DS17487 15 of 38 UPDATE CYCLE The serialized RTC executes an update cycle once per second regardless of the SET bit in Register B. When the

DS17485/DS17487 16 of 38 EXTENDED FUNCTIONS The extended functions provided by the DS17485/DS17487 that are new to the RAMified RTC family are acces

DS17485/DS17487 17 of 38 can be used to determine if and how many RTC writes have occurred since the last time this register was read. Auxiliary Ba

DS17485/DS17487 18 of 38 A kickstart sequence occurs when kickstarting is enabled through KSE = 1. While the system is powered down, the KS input

DS17485/DS17487 19 of 38 During interval 5, the system is fully powered down. Battery backup of the clock calendar and NV RAM is in effect and IRQ

DS17485/DS17487 2 of 38 ORDERING INFORMATION PART # DESCRIPTION DS17485XX-X RTC Chip DS17487X-X RTC Module; 24-pin DIP

DS17485/DS17487 20 of 38 Figure 4. DS17485/DS17487 EXTENDED REGISTER BANK DEFINITION BANK 0 BANK 1MSBDV0 = 0LSB MSBDV0 = 1LSB00 000D 0D0E 0E3F 3F

DS17485/DS17487 21 of 38 EXTENDED CONTROL REGISTERS Two extended control registers are provided to supply controls and status information for the ex

DS17485/DS17487 22 of 38 EXTENDED CONTROL REGISTER 4B MSB LSB BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 ABE E32k CS RCE PRS RIE

DS17485/DS17487 23 of 38 SYSTEM MAINTENANCE INTERRUPT (SMI) RECOVERY STACK An SMI recovery register stack is located in the extended register bank,

DS17485/DS17487 24 of 38 ABSOLUTE MAXIMUM RATINGS* Voltage Range on Any Pin Relative to Ground -0.3V to +7.0V Storage Temperature Range -40°C

DS17485/DS17487 25 of 38 DC ELECTRICAL CHARACTERISTICS Over the operating range (5V) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Average VCC Power Sup

DS17485/DS17487 26 of 38 DC ELECTRICAL CHARACTERISTICS Over the operating range (3V) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Average VCC Power-Sup

DS17485/DS17487 27 of 38 RTC AC TIMING CHARACTERISTICS Over the operating range (3V) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Cycle Time tCYC 360

DS17485/DS17487 28 of 38 RTC AC TIMING CHARACTERISTICS Over the operating range (5V) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Cycle Time tCYC

DS17485/DS17487 29 of 38 BUS TIMING FOR READ CYCLE TO RTC AND RTC REGISTERS BUS TIMING FOR WRITE CYCLE TO RTC AND RTC REGISTERS

DS17485/DS17487 3 of 38 The DS17485/DS17487 power-control circuitry allows the system to be powered on by an external stimulus such as a keyboard or

DS17485/DS17487 30 of 38 POWER-UP/POWER-DOWN TIMING, 5V (TA = +25°C) PARAMETER SYMBOL MIN TYP MAX UNITS NO

DS17485/DS17487 31 of 38 POWER-UP CONDITION, 3V POWER-DOWN CONDITION, 3V

DS17485/DS17487 32 of 38 POWER-UP CONDITION, 5V POWER-DOWN CONDITION, 5V

DS17485/DS17487 33 of 38 WAKE-UP/KICKSTART TIMING Note: Time intervals shown above are referenced in Wake-Up/Kickstart section. *This condition c

DS17485/DS17487 34 of 38 BURST MODE TIMING WAVEFORM NOTES: 1) Typical values are at +25°C and nominal supplies. 2) Outputs are

DS17485/DS17487 35 of 38 DS17485 24-PIN DIP PKG 24-PIN DIM MIN MAX A IN MM 1.245 31.62 1.270 32.25 B IN MM 0.530 13.46 0.550 13.97 C IN MM 0.14

DS17485/DS17487 36 of 38 DS17485 24-PIN SO The chamfer on the body is optional. If it is not present, a terminal 1 identifier must be positioned

DS17485/DS17487 37 of 38 DS17485 28-PIN TSOP PKG 28-PIN DIM MIN MAX A — 1.20 A1 0.05 — A2 0.91 1.02 b 0.18 0.27 c 0.15 0.20 D 13.20 13.60

DS17485/DS17487 38 of 38 DS17487 RTC PLUS RAM Note: Pins 2, 3, 16, and 20 are missing by design. PKG 24-PIN DIM MIN MAX A IN MM 1.320 33.53 1.

DS17485/DS17487 4 of 38 WR – RTC Write Input; Active Low. The WR signal is an active low signal. The WR signal defines the time period during w

DS17485/DS17487 5 of 38 Figure 1. BLOCK DIAGRAM

DS17485/DS17487 6 of 38 DS17485 ONLY X1, X2 – Connections for a standard 32.768kHz quartz crystal. For greatest accuracy, the DS17485 must be used w

DS17485/DS17487 7 of 38 RTC ADDRESS MAP The address map for the RTC registers of the DS17485/DS17487 is shown in Figure 2. The address map consists

DS17485/DS17487 8 of 38 The three time alarm bytes can be used in two ways. First, when the alarm time is written in the appropriate hours, minutes

DS17485/DS17487 9 of 38 CONTROL REGISTERS The four control registers; A, B, C, and D reside in both bank 0 and bank 1. These registers are accessibl