
DS1500 Y2KC Watchdog RTC with Nonvolatile Control
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SETTING THE CLOCK
It is recommended to halt updates to the external set of double buffered RTC registers when writing to the clock.
The (TE) bit should be used as described above before loading the RTC registers with the desired RTC count (day,
date, and time) in 24-hour BCD format. Setting the (TE) bit to 1 transfers the new values written to the internal RTC
registers and allows normal operation to resume.
CLOCK ACCURACY
A standard 32.768kHz quartz crystal should be directly connected to the DS1500 X1 and X2 oscillator pins. The
crystal selected for use should have a specified load capacitance (C
L
) of either 6pF or 12.5pF, and the crystal
select (CS) bit set accordingly. For more information about crystal selection and crystal layout considerations, refer
to Application Note 58: Crystal Considerations with Dallas Real-Time Clocks. An external 32.768kHz oscillator can
also drive the DS1500. To achieve low-power operation when using an external oscillator, it may be necessary to
connect the X1 pin to the external oscillator signal through a series connection consisting of a resistor and a
capacitor. A typical configuration consists of a 1.0M resistor in series with a 100pF ceramic capacitor. When using
an external oscillator the X2 pin must be left open. Accuracy of DS1510 is better than ±1min/month at +25°C.
Table 2. Register Map
DATA
ADDRESS
B7 B6 B5 B4 B3 B2 B1 B0
FUNCTION
BCD
RANGE
00H
0 10 Seconds Seconds Seconds 00–59
01H
0 10 Minutes Minutes Minutes 00–59
02H
0 0 10 Hours Hour Hours 00–23
03H
0 0 0 0 0 Day Day 1–7
04H
0 0 10 Date Date Date 01–31
05H
EOSC E32K
BB32 10 MO Month Month 01–12
06H
10 YEAR Year Year 00–99
07H
10 CENTURY Century Century 00–39
08H
AM1 10 Seconds Seconds Alarm Seconds 00–59
09H
AM2 10 Minutes Minutes Alarm Minutes 00–59
0AH
AM3 0 10 Hours Hour Alarm Hours 00–23
0BH
AM4 Dy/Dt 10 Date Day/Date Alarm Day/Date 1–7/1–31
0CH
0.1 Second 0.01 Second Watchdog 00–99
0DH
10 Second Second Watchdog 00–99
0EH
BLF1 BLF2 PRS PAB TDF KSF WDF IRQF Control A
0FH
TE CS BME TPE TIE KIE WDE WDS Control B
10H
Extended RAM Address RAM Address LSB 00–FF
11H
Reserved
12H
Reserved
13H
Extended RAM Data RAM Data 00–FF
14H-1FH Reserved
0 = “0” and are read only.
POWER-UP DEFAULT STATES
These bits are set upon power-up: EOSC = 0, E32K = 0, TIE = 0, KIE = 0, WDE = 0, and WDS = 0.
Note: Unless otherwise specified, the state of the control/RTC/SRAM bits in the DS1500 is not defined upon initial
power application; the DS1500 should be properly configured/defined during initial configuration.
USING THE CLOCK ALARM
The alarm settings and control reside within registers 08h to 0Bh (Table 2). The TIE bit and alarm mask bits AM1 to
AM4 must be set as described below for the
IRQ or PWR outputs to be activated for a matched alarm condition.
The alarm functions as long as at least one supply is at a valid level. Note that activating the
PWR pin requires the
use of V
BAUX
.
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