Rainbow-electronics DS1202S Manual do Utilizador descarregar pdf (Página 9)

DS1202, DS1202S

032697 9/11

10.I

CC2

is specified with RST, I/O, and SCLK open. The clock halt flag must be set to logic one (oscillator disabled).

11. At power–up, RST

must be at a logic 0 until V

2 volts. Also, SCLK must be at a logic 0 when RST is driven

to a logic one state.

12.If t

exceeds 100 ms with RST in a logic one state, then I

may briefly exceed I

specification.

DS1202 SERIAL TIMEKEEPER 8–PIN DIP

A IN. 0.360 0.400

B IN. 0.240 0.260

C IN. 0.120 0.140

D IN. 0.300 0.325

E IN. 0.015 0.040

F IN. 0.110 0.140

G IN. 0.090 0.110

H IN. 0.320 0.370

J IN. 0.008 0.012

K IN. 0.015 0.021

8–PINPKG

DIM MIN MAX

1 2 3 4 5 6 7 8 9 10 11

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Rainbow-electronics DS1202S Manual do Utilizador Página 9